skip header   hitachi.com   hitachi.us    Global
Hitachi Global Storage Technologies
 
Travelstar 6GN
Electrical interface specifications
Models: DBCA-203240, 204860 and 206480

IDE interface connector
IDE connector
Notes: Pin position 20 is left blank for secure connector insertion. Pin position A,B,C, and D are used for setting the drive's address.

Signal definition

The pin assignments of interface signals are listed as follows:
  
Pin Signal I/O Pin Signal I/O
01 -RESET I 02 GND
03 DD07 I/O 04 DD08 I/O
05 DD06 I/O 06 DD09 I/O
07 DD05 I/O 08 DD10 I/O
09 DD04 I/O 10 DD11 I/O
11 DD03 I/O 12 DD12 I/O
13 DD02 I/O 14 DD13 I/O
15 DD01 I/O 16 DD14 I/O
17 DD00 I/O 18 DD15 I/O
19 GND (20) KEY
21 DMARQ O 22 GND
23 -DIOW * I 24 GND
25 -DIOR * I 26 GND
27 IORDY * O 28 CSEL I
29 -DMACK I 30 GND
31 INTRQ O 32 -IOCS16 O
33 DA01 I 34 -PDIAG I/O
35 DA00 I 36 DA02 I
37 -CS0 I 38 -CS1 I
39 -DASP I/O 40 GND
41 +5V Logic PWR 42 +5V Motor PWR
43 GND 44 Reserved

Notes:
  1. "O" designates an output from the drive.

  2. "I" designates an input to the drive.

  3. "I/O" designates an input/output common.

  4. "PWR" designates a power supply to the drive.

  5. "(Resv)" designates reserved pins which must be left unconnected.

  6. "*" these signal lines are redifined during the Ultra DMA protocol to provide special functions as detailed in the table below. These lines change from the conventional to special definitions at the moment the host decides to allow a DMA burst, if the Ultra DMA transfer mode was previously chosen via SetFeatures. The drive becomes aware of this change upon assertion of the -DMACK line. These lines revert back to their original definitions upon the deassertion of -DMACK at the termination of the DMA burst.

    There are two input pins for +5 Volt power supply, "+5V Logic" and "+5V Motor". "+5V Logic" is connected to the internal logic circuits and "+5V Motor" is connected to the spindle motor and motor driver.

    It is possible to turn on and off "+5V Logic" by an external switch circuit to reduce power consumption to the least possible. In this mode, a voltage drop out due to the motor spin up current can be reduced by connecting "+5V Motor" line into the system power source directly.

    If the above power management option is used, all signal lines that will be electrically active in the host system while the hard disk drive is disconnected from power line shall be isolated by three-state line drivers. Internal leakage through ESD protection circuit may pull down LPUL (least positive up level) of logic signal below specification.

    Use both lines in parallel, for regular hard disk drive applications.


    Special Definition (Ultra DMA) Conventional Definition
    Write Operation -DDMARDY IORDY
    HSTROBE -DIOR
    STOP -DIOW
    Read Operation -HDMARDY -DIOR
    DSTROBE IORDY
    STOP -DIOW





  Terms of Use | Privacy Policy | Contact Us  © 2008 Hitachi Global Storage Technologies